Embodiments of the present disclosure relate generally to semiconductor integrated circuits, and more particularly to internal voltage generation circuits.
In general, a semiconductor memory device receives a power supply voltage VDD and a ground voltage VSS from an external device to generate internal voltages used in various operations of internal circuits constituting the semiconductor memory device. The internal voltages for operating the internal circuits of the semiconductor memory device may include a core voltage VCORE supplied to a memory core region, a high voltage VPP used to drive or overdrive word lines or the like, and a back-bias voltage VBB applied to a bulk region (or a substrate) of NMOS transistors in the memory core region.
The core voltage VCORE may be a positive voltage which is lower than the power supply voltage VDD supplied by the external device. Thus, the core voltage VCORE may be generated by lowering the power supply voltage VDD to a certain level. In contrast, the high voltage VPP may be higher than the power supply voltage VDD, and the back-bias voltage VBB may be a negative voltage which is lower than the ground voltage VSS. Thus, charge pump circuits may be required to generate the high voltage VPP and the back-bias voltage VBB.
In addition, the internal voltages used in the semiconductor memory device may include a bit line pre-charge voltage VBLP for pre-charging bit lines and a cell plate voltage VCP applied to a plate electrode of memory cells. The bit line pre-charge voltage VBLP and the cell plate voltage VCP may be set to have the same level (e.g., a half of the core voltage VCORE). Accordingly, the bit line pre-charge voltage VBLP and the cell plate voltage VCP may be generated by internal voltage generation circuits having the same configuration. The internal voltage generation circuits for generating the bit line pre-charge voltage VBLP and the cell plate voltage VCP may be configured such that different internal voltage generation circuits generate the bit line pre-charge voltage VBLP and the cell plate voltage VCP, respectively.